Index

Lecture 11

6. Deferred Exceptions

e.g.

BEQZ    R4, L1
LW      R1, (R5)
ADD     R2, R1, R5
LW.S    R1, (R5)    ;set poison bit if it faults
BEQZ    R4, L1
LW.C    R1, (R5)    ;handle excption if poison bit is set
ADD     R2, R1, R5

IA-64

ld8.s   r1=[r5];;   ;set poison bit
br      L1
chk.s   r1, repair  ;branch to repair if poison
L2: add     r2=r1, r3
repair ld8 r1=[r5]  ;non-speculative load
b       l2

7. Predicated Execution

e.g.

if (A && B)     //R1 R2
    j = j + 1;  //R4
else if (C)     //R3
    k = k + 1;  //R5
else
    k = k - 1;  //R6
i =i + 1;
BEQ     R1, R0, L1 
NOP 
BEQ     R2, R0, L1
NOP
ADDI    R4, R4, 1
J       L3
NOP
L1 BEQ  R3, R0, L2
NOP ADDI R5, R5, 1
J       L3
NOP
L2 SUBI R5, R5, 1
L3 ADDI R6, R6, 1

ARM

CMP     R1, #0          set condition flat(N, Z, C, V)
CMPNE   R2, #0          conditionally executed if Z flag is not set
ADDNE   R4, R4, #1
JNE     L1
CMP     R3, #0
ADDNE   R5, R5, #1
SUBEQ   R5, R5, #1
L1 ADD  R6, R6, #1

8 instructions - longest path = 8

IA-64

    cmp.eq      p1, p2=r0, c1;;     p1=(r1==0), p2=!(r1==0)
(p2)cmp.eq      p1, p3=r0, r2       if p2 {p1=(r2==0), p3=!(r2==0)}
(p3)add         r4=r4,1
(p1)cmp.ne.unc  p4,p5=0,r3          p4=p1&&(r3!=0), p5=p1&&!(r3!=0) unc clears both predicate register if predicate is false
(p4)add         r5=r5,1
(p5)sub         r5=r5,1
    add         r6=r6,1

7 instruction - longest path = 7

8 IA-64

Index