Index

# Lecture 03

## 4 Miscellaneous

• Parameter: defines a constant e.g. parameter n = 8;
• enumerations e.g. enum bit[1:0] {READY, COUNTING, DONE} state;
• arrays e.g.

reg [7:0] a [0:3];   // 4 8-bit registers
wire [7:0] x = a[3];
wire y = a[3][0];
• $display - output to console (like printf) %d,$time
• $monitor - outputs whenver watched signals are modified • $stop/$finish - pause or end simulation • $readmemb, \$reamemh - reads data from file into an array
• logic
• replaces wires and regs
• use with always_ff, always_latch, always_comb
• literals
• numeric literals default to signed decimal represented in 2's complement notation and zero-padded to required number of bits
• sized literals, [n]['base][value], e.g. carry_in = 1'b0; d =32'habcd1234.
• repeated literals
• '1 - all bits 1.
• '0 - all bits 0.
• 'x - all bits x.
• 'z - all bits z.

## 5 Design Example: Complex Multiplier

$$p = a * b = p_r + ip_i = (a_r + ia_i)(b_r + ib_i) = (a_rb_r-a_ib_i)+i(a_rb_i+a_ib_r)$$

• require 4 multiplications and 2 add/substracts
• save area by reusing the multiplier and adder/substracter
• design consists of the datapath (muxes, multiplier, adder, regs, wires) and control logic which is implemented via finite state machines (FSM).
step a_sel b_sel pp1_en pp2_en sub p_r_en p_i_en
0 $$0$$ $$0$$ $$1$$ $$x$$ $$x$$ $$x$$ $$x$$ pp1 <= a_r * b_r
1 $$1$$ $$1$$ $$0$$ $$1$$ $$x$$ $$x$$ $$x$$ pp2 <= a_i * b_i
2 $$0$$ $$1$$ $$1$$ $$x$$ $$1$$ $$1$$ $$x$$ p_r <= pp1 - pp2
pp1 <= a_r * b_i
3 $$1$$ $$0$$ $$0$$ $$1$$ $$x$$ $$0$$ $$x$$ pp2 <= a_i * b_r
4 $$x$$ $$x$$ $$x$$ $$x$$ $$0$$ $$0$$ $$1$$ pp2 <= a_i * b_r

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